174x58 1/29 ICN2053
174x58, 1/29 scan, ICN2053, rcvbp
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Module
entry
- file
- config/panels/mined/174x58-29s-icn2053.toml
- status
- generates
- origin
- mined
- vendor files
- 12
- agreement
- 1
- vendors
- Colorlight
- examples
- P1.83-29S-174X87-2153+2018-5.92-907+20P adapter board.rcvbp P1.83-174X87-29S-2053+2012-E320-6.10.rcvbp P1.83-29S-174X87-2053+5957-5.92-907+20P adapter board.rcvbp
- notes
- the pixel map has 5046 entries; the block-7 image builder packs at most 4096, so `rxp config gen` writes the .rcvbp but not the boot image
chip
- name
- ICN2053 (mined)
- library
- config/chips/mined/icn2053.toml
spec
- name
- 174x58-29s-icn2053
module
- width
- 174
- height
- 58
- scan
- 29
- line_dir
- 0
- data_groups
- 1
- serial_clock
- 15
screen
- width
- 174
- height
- 58
Wiring
mapping
- reversed_groups
- true
- reversed_lines
- false
- block
- 174
boot
- arm_at_boot
- true
Timing
current
- gains
- [224, 224, 224, 43]
- percent
- [0.1, 0.1, 0.1]
config/panels/mined/174x58-29s-icn2053.toml
# generated by scripts/corpus-mine.py; regenerate rather than edit name = "174x58-29s-icn2053" [meta] status = "generates" origin = "mined" sources = 12 agreement = 1.00 examples = ["P1.83-29S-174X87-2153+2018-5.92-907+20P adapter board.rcvbp", "P1.83-174X87-29S-2053+2012-E320-6.10.rcvbp", "P1.83-29S-174X87-2053+5957-5.92-907+20P adapter board.rcvbp"] vendors = ["Colorlight"] notes = "the pixel map has 5046 entries; the block-7 image builder packs at most 4096, so `rxp config gen` writes the .rcvbp but not the boot image" [module] width = 174 height = 58 scan = 29 line_dir = 0 data_groups = 1 serial_clock = 15 [screen] width = 174 height = 58 [chip] library = "config/chips/mined/icn2053.toml" [current] gains = [224, 224, 224, 43] percent = [0.1, 0.1, 0.1] [mapping] reversed_groups = true reversed_lines = false block = 174 [boot] arm_at_boot = true