160x40 1/20 ICN2053
160x40, 1/20 scan, ICN2053, rcvbp
Download
Module
entry
- file
- config/panels/mined/160x40-20s-icn2053.toml
- status
- generates
- origin
- mined
- vendor files
- 8
- agreement
- 1
- vendors
- Colorlight
- examples
- P1.25-160x80-20S-5960-ICN2053-4020Hz.rcvbp Q2AC20(2053+2013)-W1.rcvbp Q2AC20(2153+5266)-W1.rcvbp
chip
- name
- ICN2053 (mined)
- library
- config/chips/mined/icn2053.toml
spec
- name
- 160x40-20s-icn2053
module
- width
- 160
- height
- 40
- scan
- 20
- line_dir
- 0
- data_groups
- 1
- serial_clock
- 15
screen
- width
- 160
- height
- 40
Wiring
mapping
- reversed_groups
- true
- reversed_lines
- false
- block
- 160
boot
- arm_at_boot
- true
Timing
current
- gains
- [230, 230, 230, 43]
- percent
- [0.1, 0.1, 0.1]
config/panels/mined/160x40-20s-icn2053.toml
# generated by scripts/corpus-mine.py; regenerate rather than edit name = "160x40-20s-icn2053" [meta] status = "generates" origin = "mined" sources = 8 agreement = 1.00 examples = ["P1.25-160x80-20S-5960-ICN2053-4020Hz.rcvbp", "Q2AC20(2053+2013)-W1.rcvbp", "Q2AC20(2153+5266)-W1.rcvbp"] vendors = ["Colorlight"] [module] width = 160 height = 40 scan = 20 line_dir = 0 data_groups = 1 serial_clock = 15 [screen] width = 160 height = 40 [chip] library = "config/chips/mined/icn2053.toml" [current] gains = [230, 230, 230, 43] percent = [0.1, 0.1, 0.1] [mapping] reversed_groups = true reversed_lines = false block = 160 [boot] arm_at_boot = true