144x48 1/24 ICN2053
144x48, 1/24 scan, ICN2053, rcvbp
Download
Module
entry
- file
- config/panels/mined/144x48-24s-icn2053.toml
- status
- generates
- origin
- mined
- vendor files
- 6
- agreement
- 1
- vendors
- Colorlight
- examples
- P1.667-24S-144X72-2053+5957-5.88-907+20P adapter board.rcvbp P1.667-144X72-24S-2053+2012-E320-6.10.rcvbp P1.38-24S-3420-144X72-5960-ICN2053.rcvbp
chip
- name
- ICN2053 (mined)
- library
- config/chips/mined/icn2053.toml
spec
- name
- 144x48-24s-icn2053
module
- width
- 144
- height
- 48
- scan
- 24
- line_dir
- 0
- data_groups
- 0
- serial_clock
- 14
screen
- width
- 144
- height
- 48
Wiring
mapping
- reversed_groups
- true
- reversed_lines
- false
- block
- 144
boot
- arm_at_boot
- true
Timing
current
- gains
- [230, 230, 230, 43]
- percent
- [0.1, 0.1, 0.1]
config/panels/mined/144x48-24s-icn2053.toml
# generated by scripts/corpus-mine.py; regenerate rather than edit name = "144x48-24s-icn2053" [meta] status = "generates" origin = "mined" sources = 6 agreement = 1.00 examples = ["P1.667-24S-144X72-2053+5957-5.88-907+20P adapter board.rcvbp", "P1.667-144X72-24S-2053+2012-E320-6.10.rcvbp", "P1.38-24S-3420-144X72-5960-ICN2053.rcvbp"] vendors = ["Colorlight"] [module] width = 144 height = 48 scan = 24 line_dir = 0 data_groups = 0 serial_clock = 14 [screen] width = 144 height = 48 [chip] library = "config/chips/mined/icn2053.toml" [current] gains = [230, 230, 230, 43] percent = [0.1, 0.1, 0.1] [mapping] reversed_groups = true reversed_lines = false block = 144 [boot] arm_at_boot = true