112x104 1/52 SM16389

Panels

112x104, 1/52 scan, SM16389, rcvbp

Download

Module

112x104 1/52

entry

file: config/panels/mined/112x104-52s-sm16389.toml
status: generates
origin: mined
vendor files: 10
agreement: 1
vendors: Colorlight
examples: indoorP1.53-208x104-52S-16389+2018-V3.X.rcvbp indoorP1.53-208x104-52S-16389+5958-V3.X.rcvbp P1.53-208x104-52S-16389+2018-S.1,H对开-hub320.rcvbp
notes: the pixel map has 5824 entries; the block-7 image builder packs at most 4096, so `rxp config gen` writes the .rcvbp but not the boot image

chip

name: SM16389 (mined)
library: config/chips/mined/sm16389.toml

Wiring

spec

parse error: cannot parse value: "P1.53-208x104-52S-16389+2018-S.1

Timing

config/panels/mined/112x104-52s-sm16389.toml

# generated by scripts/corpus-mine.py; regenerate rather than edit

name = "112x104-52s-sm16389"

[meta]
status = "generates"
origin = "mined"
sources = 10
agreement = 1.00
examples = ["indoorP1.53-208x104-52S-16389+2018-V3.X.rcvbp", "indoorP1.53-208x104-52S-16389+5958-V3.X.rcvbp", "P1.53-208x104-52S-16389+2018-S.1,H\u5bf9\u5f00-hub320.rcvbp"]
vendors = ["Colorlight"]
notes = "the pixel map has 5824 entries; the block-7 image builder packs at most 4096, so `rxp config gen` writes the .rcvbp but not the boot image"

[module]
width = 112
height = 104
scan = 52
line_dir = 0
data_groups = 1
serial_clock = 14

[screen]
width = 112
height = 104

[chip]
library = "config/chips/mined/sm16389.toml"

[current]
gains = [43, 43, 43, 43]
percent = [0.1, 0.1, 0.1]

[mapping]
reversed_groups = true
reversed_lines = false
block = 112

[boot]
arm_at_boot = true