receiverproxy

104x104 1/52 DP5525

104x104, 1/52 scan, DP5525, rcvbp

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Module

104x104 1/52

entry

file
config/panels/mined/104x104-52s-dp5525.toml
status
generates
origin
mined
vendor files
7
agreement
1
vendors
Colorlight
examples
P1.538-DP3264-32020-3840-2021.4.30.rcvbp Q3.0AH52(3264+32020)-W1.rcvbp Q3.0AH52(3264+5366)-W1.rcvbp
notes
the pixel map has 5408 entries; the block-7 image builder packs at most 4096, so `rxp config gen` writes the .rcvbp but not the boot image

chip

name
DP5525 (mined)
library
config/chips/mined/dp5525.toml

spec

name
104x104-52s-dp5525

module

width
104
height
104
scan
52
line_dir
0
data_groups
1
serial_clock
5

screen

width
104
height
104

Wiring

mapping

reversed_groups
true
reversed_lines
false
block
104

boot

arm_at_boot
true

Timing

current

gains
[43, 43, 43, 43]
percent
[0.1, 0.1, 0.1]

config/panels/mined/104x104-52s-dp5525.toml

# generated by scripts/corpus-mine.py; regenerate rather than edit

name = "104x104-52s-dp5525"

[meta]
status = "generates"
origin = "mined"
sources = 7
agreement = 1.00
examples = ["P1.538-DP3264-32020-3840-2021.4.30.rcvbp", "Q3.0AH52(3264+32020)-W1.rcvbp", "Q3.0AH52(3264+5366)-W1.rcvbp"]
vendors = ["Colorlight"]
notes = "the pixel map has 5408 entries; the block-7 image builder packs at most 4096, so `rxp config gen` writes the .rcvbp but not the boot image"

[module]
width = 104
height = 104
scan = 52
line_dir = 0
data_groups = 1
serial_clock = 5

[screen]
width = 104
height = 104

[chip]
library = "config/chips/mined/dp5525.toml"

[current]
gains = [43, 43, 43, 43]
percent = [0.1, 0.1, 0.1]

[mapping]
reversed_groups = true
reversed_lines = false
block = 104

[boot]
arm_at_boot = true